Reviewing Key CHIPS Act Implementation Milestones to Deliver Opportunities for the Semiconductor Supply Chain

This alert reviews key CHIPS Act implementation milestones.

The CHIPS Program Office
The CHIPS Program Office announced two funding opportunities in 2023. The first, announced in February, was the funding opportunity for the construction, expansion or modernization of commercial facilities for the fabrication of leading-edge, current-generation and mature node semiconductors. In June, the Office expanded that initial funding opportunity to include projects for the construction, expansion or modernization of semiconductor materials and manufacturing equipment facilities for which the capital investment equals or exceeds $300 million. The Department of Commerce has agreed to three preliminary agreements thus far, with awards issued ranging from $35 million to $1.5 billion with the semiconductor companies.

Statements of interest are opening for these first funding opportunities now, with optional pre-applications and final applications open on a rolling basis.

Following the June expansion, the Office announced a second funding opportunity with a separate application process designed for smaller projects. This funding opportunity was announced on September 29 for projects with capital investment under $300 million involving the construction, expansion or modernization of commercial facilities in the United States for semiconductor materials and manufacturing equipment. Direct grants totaling $500 million are available to these applicants, as opposed to the option of grant and loan financing under the first opportunity.

The small projects funding opportunity has two stages: first, applicants were required to submit concept papers between December 1, 2023, and February 1, 2024; and second, promising applicants will be invited by the Office to submit a full application.

Most recently, on February 28, 2024, the Chips Program Office issued a new funding opportunity seeking applications for research and development activities that will establish and accelerate domestic capacity for advanced packaging substrates and substrate materials. The Office anticipates dedicating approximately $300 million to this opportunity.

The CHIPS R&D Office
As Pillsbury has previously reported, the CHIPS Act also presents opportunities for fabless companies to develop innovative technology solutions to pressing semiconductor challenges. The CHIPS R&D Office will leverage $11 billion under the CHIPS Act to conduct four key activities: building the National Semiconductor Technology Center (NSTC), advancing the National Advanced Packaging Manufacturing Program, investing in metrology research, and expanding the Manufacturing USA Institutes to include facilities focus on semiconductor manufacturing technologies R&D. The R&D Office met several milestones over the course of 2023 which are detailed below.

The National Semiconductor Technology Center (NSTC)
The CHIPS R&D Office first released the NSTC vision paper in April 2023. The vision statement clarified that structure of the public-private consortium will enhance collaboration for researchers through technical centers across the country. The NSTC technical centers will provide resources for end-to-end fabrication as well as equipment for experimentation and testing. The Department has since taken the following steps to develop the NSTC:

• June 20, 2023: The Commerce Department announced the appointment of a selection committee that will appoint the Board of Trustees for the NSTC.
• July 21, 2023: The Office announced a director for the NSTC Program at the R&D Office.
• October 11, 2023: The R&D Office announced that the Trustees of the Board had been selected, with the Trustees designated to operate the NSTC alongside a yet-to-be-chosen CEO.
• November 8, 2023: It was announced that SemiUS (now known as Natcast) is the new nonprofit organization that will operate the NSTC, run by the Trustees.
• December 15, 2023: Natcast released a yearend progress report which included in its list of next steps the appointment of a CEO and building the executive team.
• January 16, 2024: The first CEO of Natcast was selected to direct the operations of the NSTC.

On February 9, 2024, the Biden Administration announced a dedicated investment of $5 billion in semiconductor research, development and workforce needs, including to develop the NSTC. This funding will cement the United States as a leader in the next generation of semiconductor technologies by supporting the design, prototyping and piloting of the latest tech, utilizing shared facilities and expertise to ensure innovators have access to critical capabilities, and building and sustaining a robust workforce. The NSTC will also house an investment fund to support R&D developers in the United States.

The Administration also announced hundreds of millions in funding to other R&D projects, such as the CHIPS Manufacturing USA Institute, the National Advanced Packaging Manufacturing Program and metrology research. Now that the NSTC Trustees and CEO are in place, additional announcements on the direction and implementation of the NSTC are expected.

NAPMP Vision Statement
On November 20, 2023, the CHIPS R&D Office released the vision statement for the National Advanced Packaging Manufacturing Program (NAPMP), announcing $3 billion in strategic R&D investments focused on packaging. The goal of this program is to establish a domestic competitive advanced packaging capability.

Advanced packaging refers to a variety of techniques that increase computational capabilities while reducing power consumption and saving costs. The packaging process enables chips to connect to other devices and is the final step in making them functional before delivery, post fabrication. By accelerating advanced packaging, the program will support the breadth of semiconductor applications being actively encouraged by the private sector and complementary federal programs, like the CHIPS Program Office funding opportunities, the Microelectronic Commons and the NSTC.

The $3 billion will support the development of advanced packaging by investing in research programs and an advanced packaging pilot facility. The pilot facility will develop six priority research areas:

• Materials and Substrates: Improving the platform on which advanced packaging is built;
• Equipment, Tools and Processes: Adapting complementary metal–oxide–semiconductor (CMOS) equipment and process to handle dies and wafer with different types of substrates;
• Power Delivery, Thermal Management: Requiring new thermal materials as well as novel circuit topologies for heterogeneous integration;
• Photonics and Connections: Focusing on low error rate photonics and high-density, high-speed and low-loss active connectors;
• Chiplet Ecosystem: Researching new methodologies to ensure a high level of reusability, design and warehousing of chiplets, small partially functional semiconductor chips that when assembled at tight pitch result in a highly functional subsystem; and
• Co-design, Electronic Design Automation (EDA): Adapting designs for advanced packaging with consideration for built-in test and repair, security, interoperability and reliability.

Throughout all of these initiatives the NAPMP will integrate education and training programs to build out the semiconductor workforce. The NAPMP is expected to release its first funding opportunity focused on materials and substrates in early 2024.

The Microelectronic Commons
The DoD Microelectronic Commons has been allocated $400 million a year from FY23-FY27 to support a network of technology Hubs that will support products going from research to prototype to end user. In 2023 DoD announced the eight Hubs that will carry out the program and then hosted a forum for the Hubs to explain their operations to potential Hub members. These eight Hubs will advance technologies across six core areas: secure edge/internet of things computing, quantum technology, 5G/6G technology, electromagnetic warfare, artificial intelligence and commercial leap-ahead technologies.

The Annual Meeting
On October 17 and 18, 2023, the Department of Defense held the first Microelectronics Annual Meeting, where the eight Hubs were able to pitch their capabilities to an audience of over 750 in-person attendees and 1,000 online attendees. The meeting featured speakers from across the federal government including Deputy Secretary of Defense Kathleen Hicks, Senators Young (R-IN) and Kelly (D-AZ), Director of the CHIPS Research & Development Office Dr. Lora Weiss, and the director of the Microelectronic Commons at NSTXL.

Membership in a Hub is not required to engage with the Hub facilities; non-members can use them on a one-off basis to access facilities or equipment they may not otherwise have access to. However, membership in a Hub can help strengthen project applications and increase the chances of the Hub winning the project award, which will in turn directly benefit its members. More details on the funding opportunities are below.

Call for Projects: December 2023
As noted above, the eight ME Commons Hubs will compete annually for federal funding to evolve laboratory and fabrication prototypes to strengthen the U.S. semiconductor ecosystem. DoD will release a call for proposals each year to address different challenges across the six core technology areas. The anticipated budget for the first year is $280 million per year.

The Call for Projects was released on December 18, 2023. Questions on the Call were due January 8, 2024, and the final project proposals are due February 28, 2024. We expect the Department to announce in Q3 of 2024 which Hubs won and what amount of funding they are awarded.

As only the Hubs may participate in the call for proposals, any organizations that wish to contribute their services to receive federal funding under this program must join a Hub. Membership in the Hubs is required to remain flexible over the course of the Commons program and each Hub is able to determine how members join and whether they pay a fee. Companies may also use Hub facilities as non-members under a separate fee or access structure; however, these companies will not participate in the project proposals.

Hubs are actively advertising their unique traits to induct diverse stakeholders as members of the organizations. Some Hubs have advertised that membership would be free to lower barriers, others advertised the unique technologies that Members would have access to, and many noted that while they are focused on particular areas of technology development, the work they do will likely benefit all six program technology areas in some way. Companies can connect with Hubs through the Microelectronic Commons website.

Whether for active CHIPS funding opportunities, guidance in the planning or formulation of relevant application compliance requirements, or other semiconductor or R&D opportunities offered by the Administration, Pillsbury is ready to help your company leverage CHIPS Act opportunities to expand your business.